1. Field of the Invention
The present invention relates to a memory control circuit in a memory chip, more particularly to a memory control circuit that exchanges control signals with memory control circuits in other memory chips.
2. Description of the Related Art
In systems that access a plurality of memory chips, the memory chips are connected to a shared bus and are individually selected by chip select signals. In conventional systems, a processor or memory controller must generate a separate chip select signal for each memory chip, or a multi-bit chip select signal that can be decoded to select the memory chips individually. Each time memory access shifts from one chip to another, a new chip select signal and, for certain types of memory, other overhead signals must be generated. This overhead takes up time and imposes a processing load on the processor or memory controller. In read access, there is also a delay while the new memory chip senses and amplifies the data to be read. All of these factors slow down access operations, as will be shown in the detailed description of the invention.
It would be desirable for access to proceed continuously from one memory chip to another without delay, and without overhead.